verification tool造句
例句与造句
- application verifier is a runtime verification tool for unmanaged code
应用程序验证程序是用于非托管代码的运行时验证工具。 - this xml schema verification tool is available as a free trial download through ibm alphaworks
：这个xmlschema验证工具可从ibmalphaworks下载免费试用版。 - the certificate verification tool checks the validity of a file signed with an authenticode certificate
证书验证工具检查用authenticode证书签名的文件的有效性。 - d . song has made an extension to ssm and has developed an automatic verification tool, athena
d.song对串空间模型进行了扩展，并开发了安全协议自动验证工具athena。 - the communique proposed the use of age and customer verification tools to protect young people and the vulnerable
公报提议使用年龄以及玩家身份识别工具，保护未成年人及弱势群体。 - It's difficult to find verification tool in a sentence. 用verification tool造句挺难的
- we implemented the model-checking algorithm with java and developed a new automatic verification tool named avsp
我们使用java语言对本文的模型检测算法进行了具体实现，开发了一个拥有自主知识产权的安全协议自动验证工具avsp。 - the followed problems have been deeply researched : integrate seamlessly with existing verification tools, design data abstraction, automated verification flow implement
在该体系结构下，研究了验证工具的集成、设计数据的抽象和自动化流程的实现等问题；3 - is a software verification tool set that overcomes complexities of the embedded software environment from early-phase host-based design and development to final-phase test and validation
是软件校验工具组，克服从最初基于主机的设计及开发阶段到最终测试及校验阶段的嵌入式软件环境的复杂性，有助于节省时间和资金。 - in the end discusses the design methodology of system-on-a-chip integration verification platform and analyzes some aspects, such as data organization, verification tools, system security and management, in detail
最后进一步讨论了soc集成验证平台的设计方法，并对其在数据组织、使用工具、系统安全以及在管理上的考虑作了详细分析。 - there are two parts in the paper, the first is about the principles of opc, lithography simulation algorithms, opc implementation and based on nanoscope, a verification tool, some verification to corrected designs are implemented
本文主要包括两部分，第一部分主要介绍了光学邻近校正的原理，光刻模拟算法和光学邻近校正的实现，并且基于软件nanoscope对一些进行过光学邻近校正处理的设计进行可制造性检查，并对结果进行总结。 - at last, the layout is verified with cadence verification tools, dracula . drc ( design rule cherker ) and lvs ( layout versus schematic ) have been done successfully, which improve the feasibility of the layout design . so the whole ic design flow, from the front end to the back end of a circuit design, is completed
接着应用无锡上华标准0.6umcmos工艺提供的元器件模型参数进行了电路仿真,并根据尺寸设计规则设计了整体电路的的版图,最后运用cadence中的版图验证工具集dracula对电路版图成功地进行了drc(designrulecherker)、lvs(layoutversusschematic)验证,证明了电路版图设计的可行性,完成了ic设计从前端到后端的设计流程。 - at first, the article describes the basic concept of testbench; summaries general function verification approaches : white-box verification, black-box verification, and grey-box verification, and shows their different application situations; examples general verification tools : linting tools, code review, simulator, waveform viewer and code coverage . after doing that, it discusses how to analysis the granularity for verification and how to specify the verification, and details the construct relations between verification specification, testcase and testbench
本文首先阐述了测试平台的基本概念；归纳了常用的功能测试方法：白箱测试、黑箱测试和灰箱测试，并说明了其不同的应用场合；列举了常用的测试工具：代码静态分析工具、代码检查、仿真器、示波器和代码覆盖；接着讨论了如何在测试计划中分析测试粒度、确定待测特征；阐明了待测特征、测试实例和测试平台之间的结构关系。